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[Patch] Undocumented instructions and processor accuracy

Posted: Sun 23 Apr, 2017 12:24 pm
by Greatpsycho
This patch does the following

- Added undocumented TEST instruction(0xF6/1 and 0xF7/1) on all processors.
- Added undocumented instruction 0xF1 as alias of LOCK prefix on 286 and ICEBP on 386+ processors.
- Implemented full features of 286 LOADALL instruction
- 286 SMSW instruction set higher 12 bits to 1 as real processor does.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Sun 23 Apr, 2017 8:52 pm
by omarsis81
Wow! Great job!

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Fri 28 Apr, 2017 6:06 pm
by SarahWalker
Committed at rev 699.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Sun 30 Apr, 2017 5:00 am
by Greatpsycho
This additional patch does the following

- Raise exception #6 when attempt to execute opcode 0xC6/1~0xC6/7 and 0xC7/1~0xC7/7 on 286+ processors.
- Raise exception #13 when attempt to write code segment in protected mode.
- 286 LOADALL instruction does not alter PE bit in MSW register when in protected mode.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Mon 19 Jun, 2017 1:31 pm
by Greatpsycho
This patch applies experimental 286 TSS switching. Microport UNIX System V-AT 2.3 installer no longer crashes.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Mon 19 Jun, 2017 7:10 pm
by SarahWalker
Committed at rev 777.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Tue 20 Jun, 2017 10:59 am
by ecksemmess
Greatpsycho wrote:This additional patch does the following

- Raise exception #6 when attempt to execute opcode 0xC6/1~0xC6/7 and 0xC7/1~0xC7/7 on 286+ processors.
- Raise exception #13 when attempt to write code segment in protected mode.
- 286 LOADALL instruction does not alter PE bit in MSW register when in protected mode.



Sarah, did you ever apply this patch posted upthread from 30 April? The changes don't appear to be live in the repo currently. (Note: at first glance it looks like a few things in there may need to be checked to avoid regressions of other alterations that have been made to some of the same code since then)

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Tue 20 Jun, 2017 5:13 pm
by SarahWalker
Apparently not! Thanks for the reminder.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Tue 20 Jun, 2017 6:47 pm
by SarahWalker
Committed in revs 778-780.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Mon 26 Jun, 2017 2:05 pm
by Greatpsycho
This patch improves task switching accuracy. Borland C++ 2.0 for 286(BCX.EXE & BCCX.EXE) and Turbo debugger for 286 no longer crashes.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Wed 05 Jul, 2017 8:55 pm
by SarahWalker
Committed at rev 785.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Thu 06 Jul, 2017 2:22 pm
by Greatpsycho
More task switching fixes. It fixes OS/2 Warp 4.0 installer crashing.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Sat 08 Jul, 2017 5:40 pm
by ecksemmess
If I'm not mistaken, it looks like this last patch that fixes the OS/2 Warp 4.0 installer was committed at rev 787?

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Sun 09 Jul, 2017 5:34 pm
by SarahWalker
Sorry, yes.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Tue 11 Jul, 2017 8:58 am
by Greatpsycho
This patch does the following

- LTR instruction set TSS state to busy.
- LMSW instruction does not alter ET bit in CR0 register.
- Improved accuracy destination IP address calculation in protected mode JMP and CALL instruction via system segment.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Sun 16 Jul, 2017 3:06 pm
by SarahWalker
Committed at rev 796.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Mon 17 Jul, 2017 1:35 pm
by SA1988
The latest commit (in x86seg.c where it says "x86ss("Load CS call not present", seg & 0xfffc);" ) breaks win3.0 in protected mode. It should be set to x86np.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Mon 17 Jul, 2017 2:03 pm
by Greatpsycho
SA1988 wrote:The latest commit (in x86seg.c where it says "x86ss("Load CS call not present", seg & 0xfffc);" ) breaks win3.0 in protected mode. It should be set to x86np.


It seems 86Box's trouble. PCem doesn't have this problem.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Mon 17 Jul, 2017 2:28 pm
by Battler
Yes, I misapplied one of your patches. I fixed the problem now.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Fri 10 Nov, 2017 8:46 am
by Greatpsycho
This patch does the following.

- Implemented IDT limit too small exception on real mode.
- Changed AT compatible machine's reset vector to F000:FFF0 instead of FFFF:0000
- Set IDT limit to 0xFFFF when system reset as real machine does.

Edit : Below feature also added.
- Changed 286 and 386SX processor's address mask to 24bit.

Edit : This patch has been incorporated here.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Sun 19 Nov, 2017 11:35 am
by Greatpsycho
This patch does the following. Reworked against rev 932.

- Implemented IDT limit too small exception on real mode.
- Changed AT compatible machine's reset vector to F000:FFF0 instead of FFFF:0000
- Set IDT limit to 0xFFFF when system reset as real machine does.
- Changed 286 and 386SX processor's address mask to 24bit.
- More fixes applied to get improved accuracy.

Edit : This patch has been incorporated here.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Fri 24 Nov, 2017 8:38 am
by Greatpsycho
This patch does the following. Reworked against rev 937.

- Implemented IDT limit too small exception on real mode.
- Changed AT compatible machine's reset vector to F000:FFF0 instead of FFFF:0000
- Set IDT limit to 0xFFFF on 286 and 0x03FF on 386+ when system reset as real machine does.
- Changed 286 and 386SX processor's address mask to 24bit.
- Correctly initialize segment descriptor cache when system reset.
- Improved accuracy of ROM BIOS mapping to top 128KB address area on 286 and 386SX processor.

Edit : This patch has been incorporated here.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Sun 10 Dec, 2017 10:08 am
by Greatpsycho
This patch does the following. Reworked against commit c014367.

- Implemented IDT limit too small exception on real mode.
- Changed AT compatible machine's reset vector to F000:FFF0 instead of FFFF:0000
- Set IDT limit to 0xFFFF on 286 and 0x03FF on 386+ when system reset as real machine does.
- Changed 286 and 386SX processor's address mask to 24bit.
- Correctly initialize segment descriptor cache when system reset.
- Improved accuracy of ROM BIOS mapping to top 128KB address area on 286 and 386SX processor.
- Don't push exception error code on stack when triple fault exception occurs.

Edit : This patch has been incorporated here.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Sun 10 Dec, 2017 10:58 am
by SarahWalker
I'm holding off on this patch until after v13 is out - I don't want to make these kind of changes this close to release.

Re: [Patch] Undocumented instructions and processor accuracy

Posted: Sun 17 Dec, 2017 12:55 pm
by Greatpsycho
This patch does the following. Reworked against version 13.1.

- Implemented IDT limit too small exception on real mode.
- Changed AT compatible machine's reset vector to F000:FFF0 instead of FFFF:0000
- Set IDT limit to 0xFFFF on 286 and 0x03FF on 386+ when system reset as real machine does.
- Changed 286 and 386SX processor's address mask to 24bit.
- Correctly initialize segment descriptor cache when system reset.
- Improved accuracy of ROM BIOS mapping to top 128KB address area on 286 and 386SX processor.
- Don't push exception error code on stack when triple fault exception occurs.