VCLK question

Discussion of development and patch submission.
altheos
Posts: 37
Joined: Wed 24 Feb, 2016 7:27 pm

VCLK question

Postby altheos » Thu 02 Nov, 2017 4:39 pm

Hello,

Can someone explain how multiples VCLK is handled in Pcem ?
I found out (or maybe i'm totally wrong) that there is one svga clock and two fixed const but in case of more ?
Regards.
SarahWalker
Site Admin
Posts: 1333
Joined: Thu 24 Apr, 2014 4:18 pm

Re: VCLK question

Postby SarahWalker » Thu 02 Nov, 2017 5:55 pm

It depends on the emulated card. Which one are you using?
altheos
Posts: 37
Joined: Wed 24 Feb, 2016 7:27 pm

Re: VCLK question

Postby altheos » Fri 03 Nov, 2017 8:51 am

I use Trident ones. There is differences between TGUI9440 and 8900D : one use calculated VLCK and the other register fixed ?
SarahWalker
Site Admin
Posts: 1333
Joined: Thu 24 Apr, 2014 4:18 pm

Re: VCLK question

Postby SarahWalker » Fri 03 Nov, 2017 7:03 pm

The clock chip used with the 8900D provides a number of fixed frequencies. The TGUI9440 has a programmable PLL which allows it to generate a much wider range of frequencies.
altheos
Posts: 37
Joined: Wed 24 Feb, 2016 7:27 pm

Re: VCLK question

Postby altheos » Wed 08 Nov, 2017 10:54 am

Ok thanks for the clarification Sarah. So, in theory, i could generate a 80 Mhz VCLK. True ?
And how is this frequency simulated with pcem ?
SarahWalker
Site Admin
Posts: 1333
Joined: Thu 24 Apr, 2014 4:18 pm

Re: VCLK question

Postby SarahWalker » Wed 08 Nov, 2017 7:23 pm

The card sets svga->clock, the SVGA code then uses this when calculating horizontal display and blanking periods.

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