[Patch] Undocumented instructions and processor accuracy

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Greatpsycho
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[Patch] Undocumented instructions and processor accuracy

Post by Greatpsycho »

This patch does the following

- Added undocumented TEST instruction(0xF6/1 and 0xF7/1) on all processors.
- Added undocumented instruction 0xF1 as alias of LOCK prefix on 286 and ICEBP on 386+ processors.
- Implemented full features of 286 LOADALL instruction
- 286 SMSW instruction set higher 12 bits to 1 as real processor does.
Attachments
undoc_ops_patch.tar.gz
Patch files for undocumented instructions.
(2.73 KiB) Downloaded 211 times
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omarsis81
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Re: [Patch] Undocumented instructions and processor accuracy

Post by omarsis81 »

Wow! Great job!
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SarahWalker
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Re: [Patch] Undocumented instructions and processor accuracy

Post by SarahWalker »

Committed at rev 699.
Greatpsycho
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Re: [Patch] Undocumented instructions and processor accuracy

Post by Greatpsycho »

This additional patch does the following

- Raise exception #6 when attempt to execute opcode 0xC6/1~0xC6/7 and 0xC7/1~0xC7/7 on 286+ processors.
- Raise exception #13 when attempt to write code segment in protected mode.
- 286 LOADALL instruction does not alter PE bit in MSW register when in protected mode.
Attachments
ops_patch.tar.gz
Patch files against rev 699.
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Greatpsycho
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Re: [Patch] Undocumented instructions and processor accuracy

Post by Greatpsycho »

This patch applies experimental 286 TSS switching. Microport UNIX System V-AT 2.3 installer no longer crashes.
Attachments
x86seg.c.patch
Patch to apply 286 TSS switching.
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SarahWalker
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Re: [Patch] Undocumented instructions and processor accuracy

Post by SarahWalker »

Committed at rev 777.
ecksemmess
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Re: [Patch] Undocumented instructions and processor accuracy

Post by ecksemmess »

Greatpsycho wrote:This additional patch does the following

- Raise exception #6 when attempt to execute opcode 0xC6/1~0xC6/7 and 0xC7/1~0xC7/7 on 286+ processors.
- Raise exception #13 when attempt to write code segment in protected mode.
- 286 LOADALL instruction does not alter PE bit in MSW register when in protected mode.

Sarah, did you ever apply this patch posted upthread from 30 April? The changes don't appear to be live in the repo currently. (Note: at first glance it looks like a few things in there may need to be checked to avoid regressions of other alterations that have been made to some of the same code since then)
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SarahWalker
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Re: [Patch] Undocumented instructions and processor accuracy

Post by SarahWalker »

Apparently not! Thanks for the reminder.
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SarahWalker
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Re: [Patch] Undocumented instructions and processor accuracy

Post by SarahWalker »

Committed in revs 778-780.
Greatpsycho
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Re: [Patch] Undocumented instructions and processor accuracy

Post by Greatpsycho »

This patch improves task switching accuracy. Borland C++ 2.0 for 286(BCX.EXE & BCCX.EXE) and Turbo debugger for 286 no longer crashes.
Attachments
x86seg.c.patch
Patch for improve task switching accuracy.
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SarahWalker
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Re: [Patch] Undocumented instructions and processor accuracy

Post by SarahWalker »

Committed at rev 785.
Greatpsycho
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Re: [Patch] Undocumented instructions and processor accuracy

Post by Greatpsycho »

More task switching fixes. It fixes OS/2 Warp 4.0 installer crashing.
Attachments
x86seg.c.patch
Patch for task switching.
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ecksemmess
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Re: [Patch] Undocumented instructions and processor accuracy

Post by ecksemmess »

If I'm not mistaken, it looks like this last patch that fixes the OS/2 Warp 4.0 installer was committed at rev 787?
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SarahWalker
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Re: [Patch] Undocumented instructions and processor accuracy

Post by SarahWalker »

Sorry, yes.
Greatpsycho
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Re: [Patch] Undocumented instructions and processor accuracy

Post by Greatpsycho »

This patch does the following

- LTR instruction set TSS state to busy.
- LMSW instruction does not alter ET bit in CR0 register.
- Improved accuracy destination IP address calculation in protected mode JMP and CALL instruction via system segment.
Attachments
x86seg.c.patch
Patch for processor accuracy
(2.24 KiB) Downloaded 184 times
x86_ops_pmode.h.patch
Patch for processor accuracy
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SarahWalker
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Re: [Patch] Undocumented instructions and processor accuracy

Post by SarahWalker »

Committed at rev 796.
SA1988
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Re: [Patch] Undocumented instructions and processor accuracy

Post by SA1988 »

The latest commit (in x86seg.c where it says "x86ss("Load CS call not present", seg & 0xfffc);" ) breaks win3.0 in protected mode. It should be set to x86np.
Greatpsycho
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Re: [Patch] Undocumented instructions and processor accuracy

Post by Greatpsycho »

SA1988 wrote:The latest commit (in x86seg.c where it says "x86ss("Load CS call not present", seg & 0xfffc);" ) breaks win3.0 in protected mode. It should be set to x86np.
It seems 86Box's trouble. PCem doesn't have this problem.
Battler
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Re: [Patch] Undocumented instructions and processor accuracy

Post by Battler »

Yes, I misapplied one of your patches. I fixed the problem now.
Greatpsycho
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Re: [Patch] Undocumented instructions and processor accuracy

Post by Greatpsycho »

This patch does the following.

- Implemented IDT limit too small exception on real mode.
- Changed AT compatible machine's reset vector to F000:FFF0 instead of FFFF:0000
- Set IDT limit to 0xFFFF when system reset as real machine does.

Edit : Below feature also added.
- Changed 286 and 386SX processor's address mask to 24bit.

Edit : This patch has been incorporated here.
Last edited by Greatpsycho on Sun 17 Dec, 2017 12:57 pm, edited 4 times in total.
Greatpsycho
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Re: [Patch] Undocumented instructions and processor accuracy

Post by Greatpsycho »

This patch does the following. Reworked against rev 932.

- Implemented IDT limit too small exception on real mode.
- Changed AT compatible machine's reset vector to F000:FFF0 instead of FFFF:0000
- Set IDT limit to 0xFFFF when system reset as real machine does.
- Changed 286 and 386SX processor's address mask to 24bit.
- More fixes applied to get improved accuracy.

Edit : This patch has been incorporated here.
Last edited by Greatpsycho on Sun 17 Dec, 2017 12:56 pm, edited 3 times in total.
Greatpsycho
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Re: [Patch] Undocumented instructions and processor accuracy

Post by Greatpsycho »

This patch does the following. Reworked against rev 937.

- Implemented IDT limit too small exception on real mode.
- Changed AT compatible machine's reset vector to F000:FFF0 instead of FFFF:0000
- Set IDT limit to 0xFFFF on 286 and 0x03FF on 386+ when system reset as real machine does.
- Changed 286 and 386SX processor's address mask to 24bit.
- Correctly initialize segment descriptor cache when system reset.
- Improved accuracy of ROM BIOS mapping to top 128KB address area on 286 and 386SX processor.

Edit : This patch has been incorporated here.
Last edited by Greatpsycho on Sun 17 Dec, 2017 12:56 pm, edited 2 times in total.
Greatpsycho
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Re: [Patch] Undocumented instructions and processor accuracy

Post by Greatpsycho »

This patch does the following. Reworked against commit c014367.

- Implemented IDT limit too small exception on real mode.
- Changed AT compatible machine's reset vector to F000:FFF0 instead of FFFF:0000
- Set IDT limit to 0xFFFF on 286 and 0x03FF on 386+ when system reset as real machine does.
- Changed 286 and 386SX processor's address mask to 24bit.
- Correctly initialize segment descriptor cache when system reset.
- Improved accuracy of ROM BIOS mapping to top 128KB address area on 286 and 386SX processor.
- Don't push exception error code on stack when triple fault exception occurs.

Edit : This patch has been incorporated here.
Last edited by Greatpsycho on Sun 17 Dec, 2017 12:56 pm, edited 1 time in total.
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SarahWalker
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Re: [Patch] Undocumented instructions and processor accuracy

Post by SarahWalker »

I'm holding off on this patch until after v13 is out - I don't want to make these kind of changes this close to release.
Greatpsycho
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Re: [Patch] Undocumented instructions and processor accuracy

Post by Greatpsycho »

This patch does the following. Reworked against version 13.1.

- Implemented IDT limit too small exception on real mode.
- Changed AT compatible machine's reset vector to F000:FFF0 instead of FFFF:0000
- Set IDT limit to 0xFFFF on 286 and 0x03FF on 386+ when system reset as real machine does.
- Changed 286 and 386SX processor's address mask to 24bit.
- Correctly initialize segment descriptor cache when system reset.
- Improved accuracy of ROM BIOS mapping to top 128KB address area on 286 and 386SX processor.
- Don't push exception error code on stack when triple fault exception occurs.
Attachments
cpu_patch.tar.gz
Patch for processor and memory addressing accuracy.
(2.79 KiB) Downloaded 237 times
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SarahWalker
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Re: [Patch] Undocumented instructions and processor accuracy

Post by SarahWalker »

Committed in revs 988-995.
Greatpsycho
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Re: [Patch] Undocumented instructions and processor accuracy

Post by Greatpsycho »

This patch does the following.

- Only on 386+ processor will clear general-purpose registers on CPU soft-reset as real processor does.
- Tuned cpu_rom_prefetch_cycles value to when accessing 150ns mask-rom cycles. I think this is probably closer to real machines.

Edit : This patch has been incorporated [url=http://pcem-emulator.co.uk/phpBB3/viewtopic.php?f=5&p=13388#p13388]here[/url].
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SarahWalker
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Re: [Patch] Undocumented instructions and processor accuracy

Post by SarahWalker »

Committed the reset change at rev 1522. I've not taken the ROM timing change for now; it will work okay for some machines but I don't think the one-size-fits-all approach will work brilliantly overall. A better approach would be to allow for per-machine ROM timings, but seeing as feature freeze is tomorrow that's probably a change for v17.
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